/* SPDX-License-Identifier: GPL-2.0 */
/* Copyright(c) 2022 Huawei Technologies Co., Ltd */

#ifndef HIUDK_ADPT_H
#define HIUDK_ADPT_H

#if defined(HIUDK_ULD) && defined(HIUDK_SDK)

// crm_ops
#define hinic3_alloc_ceqs   hiudk_alloc_ceqs
#define hinic3_alloc_irqs   hiudk_alloc_irqs
#define hinic3_ceq_num   hiudk_ceq_num
#define hinic3_cos_valid_bitmap   hiudk_cos_valid_bitmap
#define hinic3_ep_id   hiudk_ep_id
#define hinic3_er_id   hiudk_er_id
#define hinic3_fault_event_report   hiudk_fault_event_report
#define hinic3_flexq_en   hiudk_flexq_en
#define hinic3_get_fake_vf_info   hiudk_get_fake_vf_info
#define hinic3_host_pf_num hiudk_host_pf_num
#define hinic3_host_pf_id_start hiudk_host_pf_id_start
#define hinic3_free_ceq   hiudk_free_ceq
#define hinic3_free_irq   hiudk_free_irq
#define hinic3_func_max_qnum   hiudk_func_max_qnum
#define hinic3_func_max_vf   hiudk_func_max_vf
#define hinic3_func_rx_tx_flush   hiudk_func_rx_tx_flush
#define hinic3_func_type   hiudk_func_type
#define hinic3_get_card_present_state   hiudk_get_card_present_state
#define hinic3_get_chip_present_flag   hiudk_get_chip_present_flag
#define hinic3_get_fw_version   hiudk_get_fw_version
#define hinic3_get_heartbeat_status   hiudk_get_heartbeat_status
#define hinic3_get_mgmt_version   hiudk_get_mgmt_version
#define hinic3_get_stateful_enable   hiudk_get_stateful_enable
#define hinic3_get_timer_enable   hiudk_get_timer_enable
#define hinic3_glb_pf_vf_offset   hiudk_glb_pf_vf_offset
#define hinic3_get_bond_create_mode   hiudk_get_bond_create_mode
#define hinic3_global_func_id   hiudk_global_func_id
#define hinic3_host_id   hiudk_host_id
#define hinic3_host_oq_id_mask   hiudk_host_oq_id_mask
#define hinic3_host_total_func   hiudk_host_total_func
#define hinic3_intr_num   hiudk_intr_num
#define hinic3_max_pf_num   hiudk_max_pf_num
#define hinic3_misx_intr_clear_resend_bit   hiudk_misx_intr_clear_resend_bit
#define hinic3_pcie_itf_id   hiudk_pcie_itf_id
#define hinic3_pf_id_of_vf   hiudk_pf_id_of_vf
#define hinic3_physical_port_id   hiudk_physical_port_id
#define hinic3_ppf_idx   hiudk_ppf_idx
#define hinic3_set_func_svc_used_state   hiudk_set_func_svc_used_state
#define hinic3_set_interrupt_cfg   hiudk_set_interrupt_cfg
#define hinic3_set_msix_auto_mask_state   hiudk_set_msix_auto_mask_state
#define hinic3_set_msix_state   hiudk_set_msix_state
#define hinic3_set_ppf_flr_type   hiudk_set_ppf_flr_type
#define hinic3_stateful_deinit   hiudk_stateful_deinit
#define hinic3_stateful_init   hiudk_stateful_init
#define hinic3_support_ppa   hiudk_support_ppa
#define hinic3_support_fc   hiudk_support_fc
#define hinic3_support_ipsec   hiudk_support_ipsec
#define hinic3_support_migr   hiudk_support_migr
#define hinic3_support_nic   hiudk_support_nic
#define hinic3_support_ovs   hiudk_support_ovs
#define hinic3_support_vbs   hiudk_support_vbs
#define hinic3_support_rdma   hiudk_support_rdma
#define hinic3_support_roce   hiudk_support_roce
#define hinic3_support_toe   hiudk_support_toe
#define hinic3_vector_to_eqn   hiudk_vector_to_eqn
#define hinic3_vf_in_pf   hiudk_vf_in_pf
#define hinic3_func_max_nic_qnum hiudk_func_max_nic_qnum
#define hinic3_get_slave_host_enable hiudk_get_slave_host_enable
#define hinic3_get_slave_bitmap hiudk_get_slave_bitmap

#define hinic3_set_host_migrate_enable hiudk_set_host_migrate_enable
#define hinic3_get_host_migrate_enable hiudk_get_host_migrate_enable

#define hinic3_is_slave_func hiudk_is_slave_func
#define hinic3_is_master_func hiudk_is_master_func
#define hinic3_is_multi_bm hiudk_is_multi_bm
#define hinic3_is_slave_host hiudk_is_slave_host
#define hinic3_is_vm_slave_host hiudk_is_vm_slave_host
#define hinic3_is_bm_slave_host hiudk_is_bm_slave_host
#define hinic3_is_guest_vmsec_enable hiudk_is_guest_vmsec_enable
#define hinic3_get_vfid_by_vfpci hiudk_get_vfid_by_vfpci
#define hinic3_set_func_nic_state hiudk_set_func_nic_state
#define hinic3_get_dev_cap   hiudk_get_dev_cap
#define hinic3_get_netdev_state hiudk_get_netdev_state
#define hinic3_get_mhost_func_nic_enable hiudk_get_mhost_func_nic_enable

#define hinic3_mbox_to_host_sync hiudk_mbox_to_host_sync

#define hinic3_get_func_vroce_enable hiudk_get_func_vroce_enable

// com_ops
#define hinic3_dma_free_coherent_align   hiudk_dma_free_coherent_align
#define hinic3_dma_zalloc_coherent_align   hiudk_dma_zalloc_coherent_align

// cqm_ops
#define cqm_bloomfilter_dec hiudk_cqm_bloomfilter_dec
#define cqm_bloomfilter_inc hiudk_cqm_bloomfilter_inc
#define cqm_cmd_alloc hiudk_cqm_cmd_alloc
#define cqm_cmd_free hiudk_cqm_cmd_free
#define cqm_fake_vf_num_set hiudk_cqm_fake_vf_num_set
#define cqm_function_hash_buf_clear hiudk_cqm_function_hash_buf_clear
#define cqm_function_timer_clear hiudk_cqm_function_timer_clear
#define cqm_get_db_addr hiudk_cqm_get_db_addr
#define cqm_get_hardware_db_addr hiudk_cqm_get_hardware_db_addr
#define cqm_lb_send_cmd_box hiudk_cqm_lb_send_cmd_box
#define cqm_lb_send_cmd_box_async hiudk_cqm_lb_send_cmd_box_async
#define cqm_object_fc_srq_create hiudk_cqm_object_fc_srq_create
#define cqm_object_get hiudk_cqm_object_get
#define cqm_object_nonrdma_queue_create hiudk_cqm_object_nonrdma_queue_create
#define cqm_object_qpc_mpt_create hiudk_cqm_object_qpc_mpt_create
#define cqm_object_rdma_queue_create hiudk_cqm_object_rdma_queue_create
#define cqm_object_rdma_table_get hiudk_cqm_object_rdma_table_get
#define cqm_object_recv_queue_create hiudk_cqm_object_recv_queue_create
#define cqm_object_share_recv_queue_create hiudk_cqm_object_share_recv_queue_create
#define cqm_ring_direct_wqe_db hiudk_cqm_ring_direct_wqe_db
#define cqm_ring_hardware_db hiudk_cqm_ring_hardware_db
#define cqm_send_cmd_box hiudk_cqm_send_cmd_box
#define cqm_send_cmd_imm hiudk_cqm_send_cmd_imm
#define cqm_service_register hiudk_cqm_service_register
#define cqm_service_unregister hiudk_cqm_service_unregister
#define cqm_timer_base hiudk_cqm_timer_base
#define cqm_object_resize_alloc_new hiudk_cqm_object_resize_alloc_new
#define cqm_object_resize_free_new hiudk_cqm_object_resize_free_new
#define cqm_object_resize_free_old hiudk_cqm_object_resize_free_old
#define cqm_object_share_recv_queue_add_container hiudk_cqm_object_share_recv_queue_add_container
#define cqm_object_srq_add_container_free hiudk_cqm_object_srq_add_container_free
#define cqm_ring_software_db hiudk_cqm_ring_software_db
#define cqm_object_delete hiudk_cqm_object_delete
#define cqm_srq_used_rq_container_delete hiudk_cqm_srq_used_rq_container_delete
#define cqm_object_offset_addr hiudk_cqm_object_offset_addr
#define cqm_object_put hiudk_cqm_object_put
#define cqm_object_funcid hiudk_cqm_object_funcid
#define cqm_dtoe_share_recv_queue_create hiudk_cqm_dtoe_share_recv_queue_create
#define cqm_dtoe_free_srq_bitmap_index hiudk_cqm_dtoe_free_srq_bitmap_index
#define cqm_need_secure_mem hiudk_cqm_need_secure_mem

// hw_ops
#define hinic3_aeq_register_hw_cb    hiudk_aeq_register_hw_cb
#define hinic3_aeq_register_swe_cb    hiudk_aeq_register_swe_cb
#define hinic3_aeq_unregister_hw_cb    hiudk_aeq_unregister_hw_cb
#define hinic3_aeq_unregister_swe_cb    hiudk_aeq_unregister_swe_cb
#define hinic3_alloc_cmd_buf    hiudk_alloc_cmd_buf
#define hinic3_alloc_db_addr    hiudk_alloc_db_addr
#define hinic3_alloc_db_phy_addr    hiudk_alloc_db_phy_addr
#define hinic3_api_csr_rd64    hiudk_api_csr_rd64
#define hinic3_ceq_register_cb    hiudk_ceq_register_cb
#define hinic3_ceq_unregister_cb    hiudk_ceq_unregister_cb
#define hinic3_clean_root_ctxt    hiudk_clean_root_ctxt
#define hinic3_cmdq_detail_resp    hiudk_cmdq_detail_resp
#define hinic3_cmdq_direct_resp    hiudk_cmdq_direct_resp
#define hinic3_cos_id_detail_resp    hiudk_cos_id_detail_resp
#define hinic3_event_callback    hiudk_event_callback
#define hinic3_free_cmd_buf    hiudk_free_cmd_buf
#define hinic3_free_db_addr    hiudk_free_db_addr
#define hinic3_free_db_phy_addr    hiudk_free_db_phy_addr
#define hinic3_func_reset    hiudk_func_reset
#define hinic3_get_board_info    hiudk_get_board_info
#define hinic3_get_hw_pf_infos    hiudk_get_hw_pf_infos
#define hinic3_get_service_adapter    hiudk_get_service_adapter
#define hinic3_link_event_stats    hiudk_link_event_stats
#define hinic3_mbox_to_pf    hiudk_mbox_to_pf
#define hinic3_mbox_to_vf    hiudk_mbox_to_vf
#define hinic3_mbox_to_vf_no_ack    hiudk_mbox_to_vf_no_ack
#define hinic3_msg_to_mgmt_api_chain_async    hiudk_msg_to_mgmt_api_chain_async
#define hinic3_msg_to_mgmt_async    hiudk_msg_to_mgmt_async
#define hinic3_msg_to_mgmt_no_ack    hiudk_msg_to_mgmt_no_ack
#define hinic3_msg_to_mgmt_sync    hiudk_msg_to_mgmt_sync
#define hinic3_ppf_tmr_start    hiudk_ppf_tmr_start
#define hinic3_ppf_tmr_stop    hiudk_ppf_tmr_stop
#define hinic3_register_mgmt_msg_cb    hiudk_register_mgmt_msg_cb
#define hinic3_register_pf_mbox_cb    hiudk_register_pf_mbox_cb
#define hinic3_register_ppf_mbox_cb    hiudk_register_ppf_mbox_cb
#define hinic3_register_service_adapter    hiudk_register_service_adapter
#define hinic3_register_vf_mbox_cb    hiudk_register_vf_mbox_cb
#define hinic3_set_root_ctxt    hiudk_set_root_ctxt
#define hinic3_sm_ctr_rd64    hiudk_sm_ctr_rd64
#define hinic3_unregister_mgmt_msg_cb    hiudk_unregister_mgmt_msg_cb
#define hinic3_unregister_pf_mbox_cb    hiudk_unregister_pf_mbox_cb
#define hinic3_unregister_ppf_mbox_cb    hiudk_unregister_ppf_mbox_cb
#define hinic3_unregister_service_adapter    hiudk_unregister_service_adapter
#define hinic3_unregister_vf_mbox_cb    hiudk_unregister_vf_mbox_cb
#define hinic3_force_complete_all    hiudk_force_complete_all
#define hinic3_get_ceq_page_phy_addr    hiudk_get_ceq_page_phy_addr
#define hinic3_set_ceq_irq_disable    hiudk_set_ceq_irq_disable
#define hinic3_init_single_ceq_status hiudk_init_single_ceq_status
#define hinic3_mbox_ppf_to_host   hiudk_mbox_ppf_to_host

// wq_ops
#define hinic3_wq_create    hiudk_wq_create
#define hinic3_wq_destroy    hiudk_wq_destroy

// dev_ops
#define hinic3_attach_nic    hiudk_attach_nic
#define hinic3_get_chip_name  hiudk_get_chip_name

#define hinic3_attach_service    hiudk_attach_service
#define hinic3_detach_nic    hiudk_detach_nic
#define hinic3_detach_service    hiudk_detach_service
#define hinic3_get_lld_dev_by_dev_name    hiudk_get_lld_dev_by_dev_name
#define hinic3_get_lld_dev_by_dev_name_unsafe    hiudk_get_lld_dev_by_dev_name_unsafe
#define hinic3_get_lld_dev_by_chip_and_port hiudk_get_lld_dev_by_chip_and_port
#define hinic3_get_ppf_lld_dev    hiudk_get_ppf_lld_dev
#define hinic3_get_ppf_lld_dev_unsafe    hiudk_get_ppf_lld_dev_unsafe
#define hinic3_get_uld_dev    hiudk_get_uld_dev
#define hinic3_get_uld_dev_unsafe    hiudk_get_uld_dev_unsafe
#define hinic3_register_uld    hiudk_register_uld
#define hinic3_set_vf_load_state   hiudk_set_vf_load_state
#define hinic3_set_vf_service_load   hiudk_set_vf_service_load
#define hinic3_set_vf_service_state   hiudk_set_vf_service_state
#define hinic3_unregister_uld    hiudk_unregister_uld
#define uld_dev_hold    hiudk_uld_dev_hold
#define uld_dev_put    hiudk_uld_dev_put

#endif
#endif
